1. Field of the Invention
The present invention generally relates to a semiconductor apparatus and, more particularly, to a semiconductor apparatus using a physical-chip-identification measuring device.
2. Description of the Related Art
The highest advanced security is necessary to protect an information management system containing personal information and confidential communications of companies and the government, the control system of production facilities to manage numberless industrial equipment, and the communication network system inside military architectures. In this event, those networks may be disconnected from the external networks. However, it may be impossible to completely terminate access from external network because a series of maintenance may be necessary, which, for example, is the maintenance of apparatuses used in the facilities and the update procedure of the programmable logic controller (PLC) to control those apparatuses. Although it may be necessary to enhance security using high-level encryption technologies, it is most difficult to implement within every machine in each facility with the most advanced security technologies. Therefore, it may be unclear when and how a backdoor was opened and if information leakage occurred. Indeed, plenty of cases have been reported such as an information leakage or a computer virus infection inside the facilities.
In closed networks, the termination of access from external networks may delay updates of the system. This may cause the security of closed networks to be vulnerable. In particular, it may be unable to update the system for many special machines. A great amount of human resources may be necessary to completely control and manage the equipment and machines in the facilities. Accordingly, the cost of countermeasures may be substantially increased.
Elements of the network of machines may be IC chips (Semiconductor chips). In a similar way as finger prints or the retina of a human being are used to identify a person, plenty of new technologies have been produced to identify one semiconductor chip from another. These technologies may prevent counterfeit chips by using the physical properties intrinsic to each chip using “Physical-chip-identification” (which is referred to as PCID hereinafter). In conventional security technologies, if copy protection is broken, it may be easy to copy digital data such as IDs or encryption keys which have been extensively used. However, PCID makes it extremely hard to copy digital data. In general, PCID may be regarded as a sufficient advantage to defenders of network against attackers.
Plenty of utilization methods of PCID measuring devices to identify semiconductor chips have been proposed. However, most of them use the generation of random numbers by monitoring the physical properties of the semiconductor chips. In constructing a security system, the utilization method on the network should be considered. For example, if one semiconductor chip counterfeits the identification of another chip, the counterfeit chip may lie between chips on the network and break the copy protection function using the physical random number intrinsic to chips.
The means of generating random numbers for PCID with physical properties of semiconductor chip may be broadly divided into two methods. One method is a circuit PCID which utilizes e-variance in circuits. The other is manufacturing a PCID which utilizes the variance in microscopic structures other than circuits (see Japan Patent Publication No. 2015-201884). The circuit PCIDs may be further divided into a delay PCID which utilizes the variance in wiring delay of circuits (see PCT Patent Publication No. 2011118548A1) and a metastability PCID which utilizes the metastability of circuits (see Japan Patent Publication No. 2013-131868). The delay PCID, more in detail, may generate random numbers using uncontrollable variance of the operation timing of a plurality of circuits integrated in IC based on the same specification of the design. Typical examples to be used for the delay PCID may be arbiter circuits, glitch circuits, ring oscillation circuits, and so forth. Typical examples to be used for the metastable PCID may be, mainly, static random access memories (SRAM hereinafter) and a latched circuit (i.e., butterfly circuit). A common weakpoint of the circuit PCIDs may be that the circuit function is sensitive to an external environment such as temperature and the output is then unstable and has a lower protection against a fault attack. Further, a common weak point of the delay PCIDs may be a small individual difference of those circuits. Accordingly, additional amplifiers or temperature sensor circuits may be indispensable, which may increase a required load for the circuit design. The length of PCID code may be thus limited and shorter. In this way, the number of semiconductor chips to be identified may be limited even with the validation of the random output, and may mean that the circuit PCID is insufficient in the Internet-of-Things (IoT hereinafter) in which everything may be connected to and by the network. The manufacturing PCIDs may utilize a manufacturing variance, such as a random disconnection of an interlayer conducting via which may be integrated on chip on purpose. However, a special structure which has not been shown in the conventional semiconductor products may be necessary to be integrated and then increase the required load of the manufacturing process. Indeed, this may be a high hurdle to widespread the manufacturing PCIDs in the majority of loT. There may be a similar example to the manufacturing PCID, in which the random number data intrinsic to a semiconductor chip to be identified may be written in the inner memory area of the semiconductor chip to be identified in advance (see Japan Patent Publication No. 2015-139010). However, this may also require an additional load on the memory cell area and increase the chip cost.